Presently known CMOS image sensors all have the same or substantially the same structures. They typically include the photosensitive devices, like a photodiode or photogate, in the pixel array to convert the optical signal to charge; a floating diffusion capacitor for converting the charge to a voltage; and a pixel amplifier buffering the floating diffusion capacitance from the large output bus capacitance and sending the electrical signal out of the pixel array. The pixel output signals are stored by a sample/hold circuit array followed by an analog signal processing chain and an analog-to-digital converter.
The drawbacks for this present CMOS image sensor is the high noise, low speed and high power. These problems can be addressed by moving the analog-to-digital conversion to earlier stages and then processing the signal in the digital domain. One such prior art for processing in digital domain in an earlier stage is disclosed in IEEE Journal of Solid-State Circuits, Vol. 36, No. 12, December 2001 (page 2049). This prior art includes a ramped voltage applied to a comparator independently of the pixel. This independence can cause pixel-to-pixel non-uniformities at the output.
Consequently, a need exists for addressing the high noise, low speed and high power of the image sensors having the latter stage analog-to-digital conversion circuits and the pixel-to-pixel non-uniformities of the image sensors having earlier stage analog-to-digital conversion circuits. This pixel-to-pixel non-uniformities is addressed in the present invention in which the transfer gate adjacent the photodiode is ramped, and the reference voltage is from the pixel reset.